--************************************************--
--**          Blok rizeni pro Hazard            **--
--**   Autor: Leos Marsalek    (c) 2002-2003    **--
--**     E-mail: Leos.Marsalek@tiscali.cz       **--
--**      Spolupracovali : Lukas Vaculík,       **--
--**              Miroslav Copian               **--
--************************************************--

library IEEE; -- Zviditelneni knihovny
use IEEE.std_logic_1164.all; -- Vyuzití knihovny

entity rizeni is 
    
port (clk3,resetin std_logic:='0';
  IR_ZA_REG,PSW:in std_logic_vector(15 downto 0);
         
ridici_slovo:inout STD_logic_vector(70 downto 0));         
end entity rizeni;

Architecture Blok_rizeni of rizeni is
alias souc_stav:STD_LOGIC_vector(downto 0is ridici_slovo (downto 0);      -- soucasny stav sekvencniho obvodu
alias vetveni:STD_LOGIC_vector(downto 0is ridici_slovo (13 downto 9);       -- Oznaceni vetveni
alias r_rw_memory:Std_logic is  ridici_slovo(14);                               -- Signal z rizeni cteni/zapis v pameti
alias r_e_alu:Std_logic is  ridici_slovo(15);                                   -- povoleni zapisu do registru D v alu
alias r_e_adr_reg_mem:Std_logic is  ridici_slovo(16);                           -- Povoleni zapisu do adresniho registru pameti
alias r_e_dataout_reg_mem:Std_logic is ridici_slovo(17);                        -- Povoleni z rizeni do DATAOUT registru
alias r_e_mem:Std_logic is ridici_slovo(18);                                    -- povoleni operaci s pameti
alias r_e_datain_reg_mem:Std_logic is ridici_slovo(19);                         -- Umozneni zapisu do DATAIN registru
alias r_e_registry:Std_logic is ridici_slovo(20);                               -- Umozneni zapisu do sady registru DST a SRC;
alias r_mux_adr_reg:Std_logic is ridici_slovo(21);                              -- nastaveni muxu u adr registru
alias r_mux_dataout:Std_logic is ridici_slovo(22);                              -- nastaveni cesty pro odchod dat
alias r_e_Ir_reg:Std_logic is ridici_slovo(23);                                 -- povoleni zapisu do IR registru
alias r_rw_dst:Std_logic is ridici_slovo(24);                                   -- vyber mezi ctenim/zapisem dst registru
alias r_rw_src:Std_logic is ridici_slovo(25);                                   -- zapis/cteni registru src
alias r_cin:STD_LOGIC_vector(downto 0is ridici_slovo(27 downto 26);         --
alias r_alu_code:STD_logic_vector(downto 0is ridici_slovo(31 downto 28);    -- kod pro operace alu
alias r_alu_code_muxSTD_logic is ridici_slovo (32);                           -- nastaveni muxu pred ALU
alias r_src_r_adrSTD_logic_vector(downto 0is ridici_slovo(38 downto 33);  -- adresa cteni SRC registru
alias r_src_w_adrSTD_logic_vector(downto 0is ridici_slovo(44 downto 39);  -- adresa zapisu SRC registru
alias r_dst_r_adrSTD_logic_vector(downto 0is ridici_slovo(50 downto 45);  -- adresa cteni DST registru
alias r_dst_w_adrSTD_logic_vector(downto 0is ridici_slovo(56 downto 51);  -- adresa zapisu dst registru
alias r_m1:STD_logic_vector(downto 0is ridici_slovo(58 downto 57);          -- nastaveni Muxu m1 pro adresaci banky registru
alias r_m2:STD_logic_vector(downto 0is ridici_slovo(60 downto 59);          -- nastaveni Muxu m2 pro adresaci banky registru
alias r_m3:STD_logic_vector(downto 0is ridici_slovo(62 downto 61);          -- nastaveni Muxu m3 pro adresaci banky registru
alias r_m4:STD_logic_vector(downto 0is ridici_slovo(64 downto 63);          -- nastaveni Muxu m4 pro adresaci banky registru
         
Alias instr:STD_LOGIC_vector (downto 0is IR_ZA_REG(15 downto 12);           -- cela instrukce pøi dvojbitovem operandu
Alias subinstr:STD_LOGIC_vector(downto 0is IR_ZA_REG(11 downto 6);          -- jednobitova instrukce pri jednobitovem operandu

Alias C:Std_logic is PSW(15);                                                   -- oznaceni jednotlivych bitu z PSW slova
Alias Z:Std_logic is PSW (14);
Alias N:STD_logic is PSw(13);
Alias V:STD_Logic is PSW (12);

begin
   
riz
:process(reset,clk3)
   
begin
    if 
reset
/='1' then
   
case souc_stav is 
     
when "000000000" =>                           -- inicializace ridiciho slova
      ridici_slovo<=(others=>'0');
      souc_stav<="000000001";
      
     
when "000000001" =>                      -- generuj na alu 0 a zapisuji do PC registru
      ridici_slovo<=(others=>'0');
      r_alu_code_mux<='1';
      r_alu_code<="0000";                             -- v=0 clear;
      r_e_alu<='1';
      r_dst_w_adr<="011111";                             -- nastaveni zapisove adresy pro DST registr
      r_m4<="00";                                     -- nastaveni muxù
      r_src_w_adr<="011111";                             -- nastaveni zapisove adresy pro SRC registr
      r_m2<="00";
      r_rw_dst<='1';                                  -- nastaven mod zapisu do banky registru
      r_rw_src<='1';
      souc_stav<="000000010";

     when "000000010" =>                       -- generuj na alu 0 a zapisuji do pomocneho registru R32
      ridici_slovo<=(others=>'0');
      r_alu_code_mux<='1';
      r_alu_code<="0000";                              -- v=0 clear;
      r_e_alu<='1';
      r_dst_w_adr<="100000";
      r_m4<="00";
      r_src_w_adr<="100000";
      r_m2<="00";
      r_rw_dst<='1';
      r_rw_src<='1';
      souc_stav<="000000100";

     
when "000000100" =>                         --preneseni instrukce z pameti a zapis do IR registru
      ridici_slovo<=(others=>'0');
      r_src_r_adr<="011111";
      r_e_adr_reg_mem
<='1';
      r_e_Ir_reg
<='1';
      R_dst_r_adr
<="100000";                           -- PC = PC + 1;
      r_cin<="10";
      r_alu_code<="1110";                               -- a+b+cin
      r_e_alu<='1';                                   --zapis do PC registru.
      r_dst_w_adr<="011111";                               -- ulozeni instrukce do banky registru
      r_m4<="00";
      r_src_w_adr<="011111";
      r_m2<="00";
      r_rw_dst<='1';
      r_rw_src<='1';
-- vetveni podle IR registru
      souc_stav<="001000000";

      when "001000000" =>                       -- dvojoperandova instrukce DST a SRC jsou v registrech adresny mod 0 0
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova
      r_m1<="01";                                   -- data_src=obsah SRC registru
      r_m3<="10";                                   -- data_dst=obsah DST registru
      r_cin<="01";                                 -- cin z dekoderu instrukci
      r_alu_code_mux<='0';                           -- Operace alu podle dekoderu instrukci
      r_e_alu<='1';
      r_m4<="10";                                   -- adresa z pole Ir_dst_registr
      r_m2<="10";                                   -- adresa z pole Ir_dst_registr
      r_rw_dst<='1';                               -- POVOLENI ZAPISU do DST
      r_rw_src<='1';                                -- povoleni zapisu do SRC
        -- povoleni vypoctu NZVC bitu
      souc_stav<="000000100";


      
when "001000010" =>                      -- dvojoperandova instrukce DST je v registru a SRC je v pameti adresny mod 1 0
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova.
      r_m1<="01";                                   -- data_src= SRC adresa dat v pameti
      r_e_adr_reg_mem<='1';                           -- cteni dat z pameti
      r_e_datain_reg_mem<='1';                         -- povoleni zapisu do Datain registru
      r_dst_w_adr<="100110";                             -- zapis do pomocneho registru 38
      r_m4<="00";
      r_src_w_adr<="100110";                             -- zapis je pro oba banky registru
      r_m2<="00";
      r_rw_dst<='1';                               -- povoleni zapisu
      r_rw_src<='1';
      souc_stav<="010000000";

     
when "010000000" =>                      -- vykon operace po prineseni SRC dat z pameti
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova
      r_src_r_adr<="100110";
      r_m1<="00";
      r_m3
<="10";
      r_cin
<="01";                                 -- cin z dekoderu instrukci
      r_alu_code_mux<='0';                           -- Operace alu podle dekoderu instrukci
      r_e_alu<='1';
      r_m4<="10";                                   -- adresa z pole Ir_dst_registr
      r_m2<="10";                                   -- adresa z pole Ir_dst_registr
      r_rw_dst<='1';                               -- POVOLENI ZAPISU do DST
      r_rw_src<='1';                                -- povoleni zapisu do SRC
        -- povoleni vypoctu NZVC bitu
      souc_stav<="000000100";


     when "001000001" =>                     -- dvojoperandova instrukce SRC je v registru a DST je v pameti adresny mod 0 1
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova.
      r_m1<="10";                                   -- data_src= DST adresa dat v pameti
      r_e_adr_reg_mem<='1';                           -- cteni dat z pameti
      r_e_datain_reg_mem<='1';                         -- povoleni zapisu do Datain registru
      r_dst_w_adr<="100111";                             -- zapis do pomocneho registru 39
      r_m4<="00";
      r_src_w_adr<="100111";                             -- zapis je pro oba banky registru
      r_m2<="00";
      r_rw_dst<='1';                               -- povoleni zapisu
      r_rw_src<='1';
      souc_stav<="010000001";

     
when "010000001" =>                      -- vykon operace po prineseni SRC dat z pameti
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova
      r_m1<="01";                                   -- Nastaveni muxu n vyber adresy z IR-SRC-registru
      r_m3<="00";
      r_dst_r_adr
<="100111";
      r_cin
<="01";                                 -- cin z dekoderu instrukci
      r_alu_code_mux<='0';                           -- Operace alu podle dekoderu instrukci
      r_e_alu<='1';
      r_m4<="00";                                   -- nastaveni muxu na vyber adresy z rizeni.
      r_m2<="00";
      r_src_w_adr
<="100111";                               -- adresa pom registru 39
      r_dst_w_adr<="100111";
      r_rw_dst
<='1';                               -- POVOLENI ZAPISU do DST
      r_rw_src<='1';                                -- povoleni zapisu do SRC
        -- povoleni vypoctu NZVC bitu
      souc_stav<="010000111";

     when "010000111" =>                     -- ulozeni vypoctenych dat z R39 dat do pameti.
      ridici_slovo<=(others=>'0');                      -- nulovani ridiciho slova
      r_m3<="00";
      r_dst_r_adr<="100111";
      r_e_dataout_reg_mem<='1';
      r_rw_memory<='1';
      souc_stav<="000000100";

     when "001000011" =>                          -- Adresny mod 1 1 prenos zdrojovych dat do registru 38
      ridici_slovo<=(others=>'0');                         -- nulovani ridiciho slova
      r_m1 <="01";                                    -- data_src= SRC adresa dat v pameti
      r_e_adr_reg_mem<='1';                              -- cteni dat z pameti
      r_e_datain_reg_mem<='1';                            -- povoleni zapisu do Datain registru
      r_dst_w_adr<="100110";                                -- zapis do pomocneho registru 38
      r_m4<="00";
      r_src_w_adr<="100110";                                -- zapis je pro oba banky registru
      r_m2<="00";
      r_rw_dst<='1';                                    -- povoleni zapisu
      r_rw_src<='1';
      souc_stav<="111111111";

     
when "111111111" =>                      -- adresny mod 1 1 prenos cilovych dat do registru 39
      ridici_slovo<=(others=>'0');                        -- nulovani ridiciho slova.
      r_m1<="10";                                     -- data_src= DST adresa dat v pameti
      r_e_adr_reg_mem<='1';                             -- cteni dat z pameti
      r_e_datain_reg_mem<='1';                           -- povoleni zapisu do Datain registru
      r_dst_w_adr<="100111";                               -- zapis do pomocneho registru 39
      r_m4<="00";
      r_src_w_adr<="100111";                               -- zapis je pro oba banky registru
      r_m2<="00";
      r_rw_dst<='1';                                 -- povoleni zapisu
      r_rw_src<='1';
      souc_stav<="111111110";
                                  
     
when "111111110" =>                     -- vykon operace po prineseni SRC dat z pameti
      ridici_slovo<=(others=>'0');                        -- nulovani ridiciho slova
      r_src_r_adr<="100110";
      r_m1<="00";
      r_DST_r_adr<="100111";
      r_m3
<="00";
      r_cin
<="01";                                   -- cin z dekoderu instrukci
      r_alu_code_mux<='0';                             -- Oerace alu podle dekoderu instrukci
      r_e_alu<='1';
      r_m4<="00";                                     -- adresa z rizeni reg 39 src bank
      r_src_w_adr<="100111";
      r_m2<="00";                                     -- adresa z rizeni reg 39 dst bank
      r_dst_w_adr<="100111";
      r_rw_dst<='1';                                 -- POVOLENI ZAPISU do DST
      r_rw_src<='1';                                  -- povoleni zapisu do SRC
        -- povoleni vypoctu NZVC bitu
      souc_stav<="010000111";
      
  
when others => null;
      
      end 
case;
    else
       souc_stav
<="000000000";
      
end if;
   
end process riz
end Blok_rizeni;